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  page . 1 stad-jan.11.2007 2N7002KW features ? r ds(on) , v gs @10v,i ds @500ma=3 ?  r ds(on) , v gs @4.5v,i ds @200ma=4 ?  advanced trench process technology  high density cell design for ultra low on-resistance  very low leakage current in off condition  specially designed for battery operated systems, solid-state relays drivers : relays, displays, lamps, solenoids, memories, etc.  esd protected 2kv hbm  component are in compliance with eu rohs 2002/95/ec directives mechanical data  case: sot-323 package  terminals : solderable per mil-std-750,method 2026  marking : k72 60v n-channel enhancement mode mosfet - esd protected maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted ) note: 1. maximum dc current limited by the package 2. surface mounted on fr4 board, t < 5 sec pan jit reserves the right to improve product design,functions and reliability without notice 3 1 g top view s d 2 r e t e m a r a pl o b m y st i m i ls t i n u e g a t l o v e c r u o s - n i a r d v s d 0 6v e g a t l o v e c r u o s - e t a g v s g + 0 2v t n e r r u c n i a r d s u o u n i t n o c i d 5 1 1a m t n e r r u c n i a r d d e s l u p ) 1 i m d 0 0 8a m n o i t a p i s s i d r e w o p m u m i x a m t a 5 2 = o c t a 5 7 = o c p d 0 0 2 0 2 1 w m e g n a r e r u t a r e p m e t e g a r o t s d n a n o i t c n u j g n i t a r e p o t j t , g t s 0 5 1 + o t 5 5 - o c ) d e t n u o m b c p ( e c n a t s i s e r l a m r e h t t n e i b m a o t - n o i t c n u j 2 r a j 5 2 6 o w / c
page . 2 stad-jan.11.2007 2N7002KW electrical characteristics v dd v out v in r g r l switching test circuit gate charge test circuit v dd v gs r g r l 1ma r e t e m a r a pl o b m y sn o i t i d n o c t s e t. n i m. p y t. x a ms t i n u c i t a t s e g a t l o v n w o d k a e r b e c r u o s - n i a r dv b s s d v s g i , v 0 = d a u 0 1 =0 6--v e g a t l o v d l o h s e r h t e t a gv ) h t ( s g v s d v = s g i , d a u 0 5 2 =1-5 . 2v e c n a t s i s e r e t a t s - n o e c r u o s - n i a r dr ) n o ( s d v s g i , v 5 . 4 = d a m 0 0 2 =--0 . 4  e c n a t s i s e r e t a t s - n o e c r u o s - n i a r dr ) n o ( s d v s g i , v 0 1 = d a m 0 0 5 =--0 . 3 t n e r r u c n i a r d e g a t l o v e t a g o r e zi s s d v s d v , v 0 6 = s g v 0 =--1a u e g a k a e l y d o b e t a gi s s g v s g =+ v , v 0 2 s d v 0 =--+ 0 1a u e c n a t c u d n o c s n a r t d r a w r o fg s f v s d i , v 5 1 = d a m 0 5 2 =0 0 1--s m e g a t l o v d r a w r o f e d o i dv d s i s v , a m 0 0 2 = s g v 0 =-2 8 . 03 . 1v c i m a n y d e g r a h c e t a g l a t o tq g v s d i , v 5 1 = d a m 0 0 2 = v s g v 5 . 4 = --8 . 0c n e m i t y a l e d n o - n r u tt n o v d d r , v 0 3 = l 0 5 1 =  i d v , a m 0 0 2 = n e g v 0 1 = r g 0 1 =  --0 2 s n e m i t y a l e d f f o - n r u tt f f o --0 4 e c n a t i c a p a c t u p n ic s s i v s d v , v 5 2 = s g v 0 = h m 0 . 1 = f z --5 3 f p e c n a t i c a p a c t u p t u oc s s o --0 1 e c n a t i c a p a c r e f s n a r t e s r e v e rc s s r --5
page . 3 stad-jan.11.2007 2N7002KW fig. 1-typical forward characteristic fig.1- output characteristic typical characteristics curves (t =25 c,unless otherwise noted) a o fig.2- transfer characteristic fig.3- on resistance vs drain current fig.4- on resistance vs gate to source voltage fig.5- on resistance vs junction temperature 0 0.2 0.4 0.6 0.8 1 1.2 012345 v ds - drain-to-source voltage (v) i d - drain-to-source current (a) v = 10v ~ 6.0v gs 4.0v 3.0v 5.0v 0 0.2 0.4 0.6 0.8 1 1.2 0123456 v gs - gate-to-source voltage (v) i d - drain source current (a) v =10v ds v =10v ds v =10v ds t =25 o c j t =25 j t =25 j 0 1 2 3 4 5 2345678910 v gs - gate-to-source voltage (v) r - on-resistance ( ) ds(on)  i =500ma d i =200ma d 0 1 2 3 4 5 0 0.2 0.4 0.6 0.8 1 i d - drain current (a) r - on-resistance ( ) ds(on)  v =10v gs v =4.5v gs 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) r ds(on) - on-resistance(normalized) v =10v i =500ma gs d
page . 4 stad-jan.11.2007 2N7002KW fig.6 - gate charge waveform fig.8 - threshold voltage vs temperature fig.7 - gate charge fig.9 - breakdown voltage vs junction temperature fig.10 - source-drain diode forward voltage qgd qgs qg qsw vgs(th) vgs qg qg(th) 0 2 4 6 8 10 0 0.2 0.4 0.6 0.8 1 q g -gatecharge(nc) v gs - gate-to-source voltage (v) v =10v i =250ma ds d 72 74 76 78 80 82 84 86 88 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) bv dss - breakdown voltage (v) i =250ua d 0.7 0.8 0.9 1 1.1 1.2 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) v th - g-s threshold voltage (normalized) i =250ua d 0.01 0.1 1 10 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 v sd - source-to-drain voltage (v) i s - source current (a) v =0v gs t =125 o c j 25 o c -55 o c
page . 5 stad-jan.11.2007 mounting pad layout ? packing information t/r - 12k per 13" plastic reel t/r - 3k per 7? plastic reel order information legal statement copyright panjit international, inc 2007 the information presented in this document is believed to be accurate and reliable. the specifications and information herein are subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others. 2N7002KW


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